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2c accurate, 12-bit digital temperature sensor data sheet adt7408 rev. a document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2006C2016 analog devices, inc. all rights reserved. technical support www.analog.com features 12-bit temperature-to-digital converter 2c accuracy operation from ?20c to +125c operation from 3 v to 3.6 v 240 ? a typical average supply current selectable 1.5c, 3c, 6c hysteresis smbus-/i 2 c?-compatible interface dual-purpose event pin: comparator or interrupt 8-lead lfcsp, 3 mm 3 mm (jedec mo-229 weed-4) package complies with jedec standard jc-42.4 memory module thermal sensor component specification applications memory module temperature monitoring isolated sensors environmental control systems computer thermal monitoring thermal protection industrial process control power system monitors functional block diagram 12- / 10-bit address pointer register event# - ? digital comparator decimator a 1 a 0 a 2 smbus/i2c interface adt7408 v ss sda scl factory reserved register temperature register manufacturer?s id register critical temp register alarm temp lower boundary trip register alarm temp upper boundary trip register configuration register capability register reference temperature sensor clk and timing generation 1 - b i t v dd 6 5 4 1 2 3 7 8 + ? lpf 1-bit dac + ? 05716-001 figure 1. general description the adt7408 is the first digital temperature sensor that complies with jedec standard jc-42.4 for the mobile platform memory module. the adt7408 contains a band gap temperature sensor and a 12-bit adc to monitor and digitize the temperature to a resolution of 0.0625c. there is an open-drain event# output that is active when the monitoring temperature exceeds a critical programmable limit or when the temperature falls above or below an alarm window. this pin can operate in either comparator or interrupt mode. there are three slave device address pins that allow up to eight adt7408 s to be used in a system that monitors temperature of various components and subsystems. the adt7408 is specified for operation at supply voltages from 3.0 v to 3.6 v. operating at 3.3 v, the average supply current is less than 240 a typical. the adt7408 offers a shutdown mode that powers down the device and gives a shutdown current of 3 ? a typical. the adt7408 is rated for operation over the ?20c to +125c temperature range. the adt7408 is available in a lead- free, 8-lead lfcsp, 3 mm 3 mm (jedec mo-229 weed-4) package.
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adt7408 data sheet rev. a | page 2 of 22 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 timing characteristics ................................................................ 4 timing diagram ........................................................................... 4 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 typical p erformance characteristics ............................................. 7 theory of operation ........................................................................ 8 circuit information ...................................................................... 8 converter details .......................................................................... 8 modes of operation ..................................................................... 8 registe rs ........................................................................................... 10 address pointer register (write only) .................................... 10 capability register (read only) .............................................. 10 configuration register (read/write) ...................................... 11 temperature trip point registers ............................................ 13 id registers ................................................................................. 14 temperature data format ......................................................... 15 event pin functionality ............................................................. 16 serial interface ............................................................................ 17 smbus/i 2 c communications ................................................... 18 applications information .............................................................. 21 thermal response time ........................................................... 21 self - heating effects .................................................................... 21 supply decoupling ..................................................................... 21 temperature monitoring ........................................................... 21 outline dimensions ....................................................................... 22 ordering guide .......................................................................... 22 revision history 6 /2016 rev. 0 to rev. a changed cp - 8 - 2 to cp - 8 - 13 ........................................ throughout changes to figure 4 .......................................................................... 6 updated outline dimensions ....................................................... 22 changes to ordering guide .......................................................... 22 3/2006 revision 0: initial version
data sheet adt7408 rev. a | page 3 of 22 specifications all specifications t a = ?20c to +125c, v dd = 3.0 v to 3.6 v, unless otherwise noted. table 1 . parameter symbol min typ max unit test conditions/comments temperature sensor and adc local sensor accuracy (c grade) 0.5 2.0 c 75c t a 95c, 3.0 v v dd 3.6 v active range 1 3.0 c 40c t a 12 5c, 3.0 v v dd 3.6 v monitor range 1 4.0 c ?20c t a 12 5c, 3.0 v v dd 3.6 v adc resolution 12 bits temperature resolution 0.0625 c temperature conversion time 60 125 ms long term drift 0.081 c drift over 10 years, if part is operated at 55c event# output (open drain) output low voltage, v ol 0.4 v i ol = 3 ma pin capacitance 10 pf high output leakage current i oh 0.1 1 a event# = 3.6 v rise time 1 t lh 30 ns fall time 1 t hl 30 ns r on resistance (low output) 1 15 ? supply and temperature dependent digital inputs input current i ih , i il ?1 +1 a v in = 0 v to v dd input low voltage v il 0.8 v 3.0 v v dd 3.6 v input high voltage v ih 2.1 v 3.0 v v dd 3.6 v scl, sda glitch rejection 1 50 ns input filtering suppresses noise spikes of less than 50 ns pin capacitance 1 10 pf digital output (open drain) output low current i ol 6 ma sda forced to 0.6 v output low voltage v ol 0.4 v 3.0 v v dd 3.6 v at i opull_up = 350 a output high voltage v oh 2.1 v output capacitance 1 c out 10 pf power requirements supply voltage v dd 3.0 3.3 3.6 v average supply current i dd 240 500 a supply current i dd_conv 360 550 a device current while converting shutdown mode at 3.3 v 3 20 a average power dissipation p d 790 w v dd = 3.3 v, normal mode at 25c 1 guaranteed by design and characterization, not production tested.
adt7408 data sheet rev. a | page 4 of 22 timing characteristics t a = ?20c to +125c, v dd = 3.0 v to 3.6 v, unless otherwise noted. table 2. parameter 1 symbol min typ max unit test conditions/comments scl clock frequency f scl 10 100 khz bus free time between a stop (p) and start (s) condition t buf 4.7 s hold time after (repeated) start condition t hd:sta 4.0 s after this period, the first clock is generated. repeated start condition setup time t su:sta 4.7 s high period of the scl clock t high 4.0 50 s low period of the scl clock t low 4.7 s fall time of both sda and scl signals t f 300 ns rise time of both sda and scl signals t r 1000 ns data setup time t su:dat 250 ns data hold time t hd:dat 300 ns setup time for stop condition t su:sto 4.0 s capacitive load for each bus line, c b 400 pf 1 guaranteed by design and characterization, not production tested. timing diagram scl sda ps p 05716-002 v ih s t r t r t f t f t su:dat t high t hd:dat t buf t low t su:sta t su:sto t hd:sta v il v ih v il figure 2. smbus/i 2 c timing diagram
data sheet adt7408 rev. a | page 5 of 22 absolute maximum ratings table 3. parameter rating v dd to v ss ?0.3 v to +7 v sda input voltage to v ss ?0.3 v to v dd + 0.3 v sda output voltage to v ss ?0.3 v to v dd + 0.3 v scl input voltage to v ss ?0.3 v to v dd + 0.3 v event# output voltage to v ss ?0.3 v to v dd + 0.3 v operating temperature range ?55c to +150c storage temperature range ?65c to +160c maximum junction temperature, t jmax 150c thermal resistance 1 ja , junction-to-ambient (still air) 85c/w ir reflow soldering profile refer to figure 3 1 power dissipation p max = (t jmax ? t a )/ ja , where t a is the ambient temperature. thermal resist ance value relates to the package being used on a standard 2-layer pcb, which gives a worst-case ja . some documents may publish junction to case, thermal resistance jc , but it refers to a component that is mounted on an ideal heat sink. as a result, junction to ambient, thermal resistance is more practical for air cooled, pcb mounted components. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. 480 seconds max. 60 ? 180 seconds 20 ? 40 seconds temperature (c) time (seconds ) 260 ? 5/+0c 150c ? 200c ramp down 6c/second max. 217c ramp up 3c/second max 60 ? 150 seconds 05716-003 figure 3. lfcsp pb-free reflow profile based on jedec j-std-20c esd caution
adt7408 data sheet rev. a | page 6 of 22 pin configuration and fu nction descriptions 8 v d d 7 e v e n t # 6 s c l 5 s d a a0 1 a1 2 a2 3 v ss 4 0 5716-004 adt7408 top view (not to scale) figure 4. pin configuration table 4. pin function descriptions pin no. mnemonic description 1 a0 smbus/i 2 c serial bus address selection pin. logic input. can be set to v ss or v dd . 2 a1 smbus/i 2 c serial bus address selection pin. logic input. can be set to v ss or v dd . 3 a2 smbus/i 2 c serial bus address selection pin. logic input. can be set to v ss or v dd . 4 v ss negative supply or ground. 5 sda smbus/i 2 c serial data input/output. serial data to be loaded into the registers of this device and read from these registers is provided on this pin. open-drain configuration; it needs a pull-up resistor. 6 scl serial clock input. this is the clock inp ut for the serial port. the serial clock is used to clock data into and clock data out from any register of the adt7408 . open-drain configuration needs a pull-up resistor. 7 event# active low. open-drain event output pin. dr iven low on comparator level or alert interrupt. 8 v dd positive supply power. deco uple the supply to ground.
data sheet adt7408 rev. a | page 7 of 22 typical performance characteristics 0.4 0.2 0.1 ?0.1 0.3 0 ?0.2 ?0.3 ?0.4 ?40 20 40 0 ?20 60 80 100 120 140 05716-015 temperature error (c) temperature (c) v dd = 3.3v figure 5. temperature accuracy 450 400 350 300 250 200 150 100 50 0 ?40 ?20 0 20 40 60 80 100 120 140 05716-017 average supply current (a) temperature (c) converting 3.3v average 3.3v figure 6. supply current vs. temperature 05716-019 average supply current (a) supply voltage (v) 150 175 200 225 250 275 300 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 t a = 85c figure 7. supply current vs. supply voltage 05716-016 shutdown current (a) supply voltage (v) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 t a = 85c figure 8. shutdown current vs. supply voltage 0.25 0.20 0.15 0.05 0.10 0 0123 6 5 4 05716-018 temperature error (c) supply ripple frequency (mhz) t a = 85c v dd = 3.3v 10% a 0.1f capacitor is connected at the v dd pin. figure 9. temperature accuracy vs. supply ripple frequency
adt7408 data sheet rev. a | page 8 of 22 theory of operation circuit information the adt7408 is a 12-bit digital temperature sensor presented in 13 bits, including the sign bit format (see the bit map in the temperature value register (read only) section). its output is twos complement in that bit d12 is the sign bit and bit d0 to bit d11 are data bits. an on-board sensor generates a voltage precisely proportional to absolute temperature, which is compared to an internal voltage reference and input to a precision digital modulator. overall accuracy for the adt7408 is 2c from +75c to +95c, 3c from +40c to +125c, and 4c from ?20c to +125c, with excellent transducer linearity. the serial interface is smbus-/i 2 c-compatible, and the open- drain output of the adt7408 is capable of sinking 6 ma. the on-board temperature sensor has excellent accuracy and linearity over the entire rated temperature range without needing correction or calibration by the user. a first-order, - modulator, also known as the charge balance type analog-to-digital converter (adc), digitizes the sensor output. this type of converter uses time domain oversampling and a high accuracy comparator to deliver 12 bits of effective accuracy in an extremely compact circuit. converter details the - modulator consists of an input sampler, a summing network, an integrator, a comparator, and a 1-bit dac, as shown in figure 10. this architecture creates a negative feedback loop that minimizes the integrator output by changing the duty cycle of the comparator output in response to input voltage changes. there are two simultaneous but different sampling operations in the device. the comparator samples the output of the integrator at a much higher rate than the input sampling frequency, that is, oversampling. oversampling spreads the quantization noise over a much wider band than that of the input signal, improving overall noise performance and increasing accuracy. the modulated output of the comparator is encoded using a circuit technique that results in smbus/i 2 c temperature data. - ? modulator integrator voltage ref and vptat clock generator lpf digital filter temperature value register comparator 12-bit 1-bit ? 1-bit dac 0 5716-005 + ? + figure 10. first-order, - modulator modes of operation the conversion clock for the part is internally generated. no external clock is required except when reading from and writing to the serial port. in normal mode, the internal clock oscillator runs an automatic conversion sequence that initiates a conversion every 100 ms. at this time, the part powers up its analog circuitry and performs a temperature conversion. this temperature conversion typically takes 60 ms, after which time the analog circuitry of the part automatically shuts down. the analog circuitry powers up again 40 ms later, when the 100 ms timer times out and the next conversion begins. because the smbus/i 2 c circuitry never shuts down, the result of the most recent temperature conversion is always available in the temperature value register. the adt7408 can be placed in shutdown mode via the configuration register, in which case the on-chip oscillator is shut down, and no further conversions are initiated until the adt7408 is taken out of shutdown mode by writing 0 to bit d8 in the configuration register. the conversion result from the last conversion prior to shutdown can still be read from the adt7408 , even when it is in shutdown mode. in normal conversion mode, the internal clock oscillator is reset after every read or write operation. this causes the device to start a temperature conversion, the result of which is typically available 60 ms later. similarly, when the part is taken out of shutdown mode, the internal clock oscillator starts, and a conversion is initiated. the conversion result is typically available 60 ms later. reading from the device before a conversion is com- plete does not stop the adt7408 from converting; the part does not update the temperature value register immediately after the conversion but waits until communication to the part is finished. this read operation provides the previous result. it is possible to miss a conversion result if the scl frequency is very slow (communication is greater than 40 ms), because the next conversion will have started. there is a 40 ms window between the end of one conversion and the start of the next conversion for the temperature value register to be updated with a new temperature value. the measured temperature value is compared with the temperature set at the alarm temperature upper boundary trip register, the alarm temperature lower boundary trip register, and the critical temperature trip register. if the measured value exceeds these limits, then the event# pin is activated. this event# output is programmable for interrupt mode, comparator mode, and the output polarity via the configuration register. the thermal sensor continuously monitors the temperature and updates the temperature data 10 times per second. temperature data is latched internally by the device and can be read by software from the bus host at any time.
data sheet adt7408 rev. a | page 9 of 22 smbus/i 2 c slave address selection pins allow up to eight such devices to co - exist on the same bus. this means that up to eight memory modules can be supported, given that each module has one slave device address slot. after initial power - on, the configuration reg isters are set to the default values. software can write to the configuration register to set bits as per the bit definitions in the registers section.
adt7408 data sheet rev. a | page 10 of 22 registers the adt7408 contains 16 accessible registers, shown in t able 5 . the address pointer register is the only register that is eight bits; the other registers are 16 bits wide. on power - up, the address pointer register is loaded with 0x00 and points to the capability register. t able 5 . registers pointer address register name power - on default read/write not applicable address pointer 0x00 write 0x00 capability 0x001d read 0x01 configuration 0x0000 read/write 0x02 alarm temperature upper boundary trip 0x0000 read/write 0x03 alarm temperature lower boundary trip 0x0000 read/write 0x04 critical temperature trip 0x0000 read/write 0x05 temperature v alue undefined read 0x06 manufacturer id 0x11d4 read 0x07 device id/ r evision 0x080x read 0x08 to 0x0f vendor d efined 0x0000 reserved address pointer regi ster (write only) this 8 - bit write only register selects which of the 16 - bit registers is accessed in subsequent read/write operations. address space between 0x08 and 0x0f is reserved for factory usage. msb lsb d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 register select register select register select register select table 6 . address pointer selected registers d2 d1 d0 register selected 0 0 0 capability 0 0 1 configuration 0 1 0 alarm temperature upper boundary trip 0 1 1 alarm temperature lower boundary trip 1 0 0 critical temperature trip 1 0 1 temperature v alue 1 1 0 manufacturer id 1 1 1 device id/ r evision capability register (read only) this 16 - bit, read - only register indicates the capabilities of the thermal sensor, as shown in table 7 and the following bit map. note that rfu means re served for future use. msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 rfu rfu rfu rfu rfu rfu rfu rfu rfu rfu rfu tres1 tres0 wider range higher precision alarm/ c ritical trips table 7 . capability mode description bit (s) function d0 ( alarm/ critical tr ips ) basic capability . d0 trips capability 1 alarm and critical trips capability . d1 ( higher p recision ) a ccuracy . d1 accuracy capability 0 default accuracy 2c over the active range and 3c over the monitor range . d2 ( wider r ange ) w ider range . d2 temperature range capability 1 can read temperature below 0c and set sign bit accordingly (default) . [d4:d3] ( temperature r esolution ) t emperature resolution . [d4:d3] temperature resolution 01 0.25c lsb . 11 0.0625c lsb (default) . [d15:d5] reserved for future use; must be 0 .
data sheet adt7408 rev. a | page 11 of 22 configuration regist er (read/write) this 16 - bit read/write register stores various configuration modes for the adt7408 , as shown in table 8 and the following bit map. note that rfu means reserved for future use. msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 rfu rfu rfu rfu rfu hysteresis shut - down mode critical lock bit alarm lock bit clear event event output status event output control critical event only event polarity event mode table 8 . configuration mode description bit (s) description d0 event mode . 0: c omparator output mode (default) . 1: i nterrupt mode . when either lock bit (d6 and d7) is set, this bit cannot be altered until unlocked. d1 event polarity . 0: a ctive low (default) . 1: a ctive high . when either lock bit (d6 and d7) is set, this bit cannot be altered until unlocked. d2 critical event only . 0: e vent output on alarm or critical temperature event (default) . 1: e vent only if temperature is above the value in the critical temperature trip register . when either lock bit (d6 and d7) is set, this bit cannot be altered until unlocked. d3 event output control . 0: e vent output disabled (default) . 1: e vent output enabled . when either lock bit (d6 and d7) is set, this bit cannot be altered until unlocked. d4 event output status (read only) . 0: e vent output condition is not being asserted by this device . 1: e vent output pin is being asserted by this device due to alarm window or critical trip condition . the actual cause of an event can be determined from the read of the temperature value register. interrupt events can be clear ed by writi ng to the clear event bit. writing to this bit has no effect on the output status because it is a read function only. d5 clear event (write only) . 0: n o effect . 1: c lears an active event in interrupt mode . writing to this register has no effect in comparator mode. when read, this bit always returns 0. once the dut temperature is greater than the critical temperature, an event cannot be cleared (see figure 12). d6 alarm window lock bit . 0: a larm trips are not locked and can be altered (default) . 1: a larm trip register settings cannot be altered . this bit is initially cleared. when set, this bit returns a 1 and remains locked until cleared by internal power on reset. th ese bits can be written with a single write and do not require double writes. d7 critical trip lock bit . 0: c ritical trip is not locked and can be altered (default) . 1: c ritical trip register settings cannot be altered . this bit is initially cleared. when set, this bit returns a 1 and remains locked until cleared by internal power on reset. th ese bits can be written with a single write and do not require double writes. d8 shutdown mode . 0: ts enabled (default) . 1: ts shut down . when shut down, the thermal sensing device and adc are disabled to save power. no events are generated. when either lock bit is set, this bit cannot be set until unlocked. however, it can be cleared at any time.
adt7408 data sheet rev. a | page 12 of 22 bit(s) description d10:d9 hysteresis enable. 00: disable hysteresis. 01: enable hysteresis at 1.5c. 10: enable hysteresis at 3c. 11: enable hysteresis at 6c. 05716-006 below window bit above window bit t h t l t h ? hyst t l ? hyst figure 11. hysteresis
data sheet adt7408 rev. a | page 13 of 22 temperature trip poi nt registers there are three temperature trip point registers. they are the alarm temperature upper boundary trip register, the alarm temp erature lower boundary trip register, and the cri tical temperature trip register. alarm temperature upper boundary trip register (read/write) the value is the upper threshold temperature value for alarm mode. the data format is twos complement with one lsb = 0.25 c. rfu (reserved for future use) bits are not supported and always report 0. interrupts respond to the programmed boundary values. if boundary values are being altered in - system, the user should turn off interrupts until a known state can be obtained to avoid superfluous interrupt activity. the f ormat of this register is shown in the following bit map: sign msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 alarm window upper boundary temperature rfu rfu alarm temperature lower boundary trip register (read/write) the value is the lower threshold temperature value for alarm mode. the data format is twos complement with one lsb = 0.25 o c. rfu bits are not supported and always report 0. interrupts respond to the programmed boundary values. if boundary values are being altered in - system, the user should turn off interrupts until a known state can be obtained to avoid superfluous interrupt activity. the format o f this register is shown in the following bit map: sign msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 alarm window upper boundary temperature rfu rfu critical temperature trip register (read/write) the value is the critical temperature. the data format is twos complement with one lsb = 0.25 o c. rfu bits are not supported and always report 0. the format of this register is shown in the following bit map: sign msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 critical temperature trip point rfu rfu temperature value register (read only) this 16 - bit, read - only register stores the trip status and the temperature measured by the internal temperature sensor, as shown in table 9 . the temperature is stored in 13 - bit, twos complement format with the msb being the temperature sign bit and the 12 lsbs representing temperature. one lsb = 0.0625 o c. the most significant bit has a r esolution of 128 o c. when reading from this register, the eight msbs (bit d15 to bit d8) are read first, and then the eight lsbs (bit d7 to bit d0 ) are read. the trip status bits represent the internal temperature trip detection and are not affected by the status of the event or configuration bits, for example, event output control, clear event. if both above and below are 0, then the current temperature is exactly within the alarm window boundaries, as defined in the configuration register. the format and descriptions are shown in table 9 and the following bit map: sign msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 above critical trip above alarm window below alarm window temperature
adt7408 data sheet rev. a | page 14 of 22 table 9 . temperature register trip status description bit definition d13 ( below alarm wind ow ) below alarm window . d13 temperature alarm status 0 temperature is equal to or above the alarm window lower boundary temperature. 1 temperature is below the alarm window lower boundary temperature. d14 ( above alarm win dow ) above alarm window d14 temperature alarm status 0 temperature is equal to or below the alarm window upper boundary temperature. 1 temperature is above the alarm window upper boundary temperature. d15 ( above critical trip ) above critical trip d15 critical trip status 0 temperature is below the critical temperature setting. 1 temperature is eual to or above the critical temperature setting. id registers manufacturer id register (read only) this manufacturer id matches that assigned to a vendor within the pci sig. this register can be used to identify the manufact urer of the device in order to perform manufacturer - specific operations. manufacturer ids can be found at www.pcisig.com . the format of this register is shown in the following bit map: d15 d14 d13 d12 d11 d10 d9 d8 d7 d16 d5 d4 d3 d2 d1 d0 0 0 0 1 0 0 0 1 1 1 0 1 0 1 0 0 device id and revision register (read only) this device id and device revision are assigned by the device manufacturer. the device revision starts at 0 and is incremented by 1 whenever an update to the device is issued by the manufacturer. the format of this register in shown in the following bit map : d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1
data sheet adt7408 rev. a | page 15 of 22 temperature data for mat the values used in the temperature register and three temperature trip point registers are in twos complement format. the temperature register has a 12 - bit resolution with 256c range with 1 lsb = 0.0625c (256c/2 12 ); see table 10 . the temperature data in the three temperature trip point registers (alarm upper, alarm lower, and critical) is a 10 - bit format with 256c range with 1 lsb = 0.25c (see the bit maps in the alarm temperature lower boundary trip register (read/write) section, the critical temperature trip register (read/write) section, and the temperature value register (read only) section.) bit d12 in all these registers represents the sign bit such that 0 = po sitive temperature and 1 = negative temperature. in twos complement format, the data bits are inverted and add 1 if bit d12 (the sign bit) is negative. temperature conversion formulas 12- bit temperature data format positive temperature = adc code (d)/16 (1) negative temperature = ( adc code (d) ? 4096)/16 (2) where d is the 12 - bit digital output in decimal. note that bit d12 (the sign bit) is not included in the adc code, but the sign is inserted in the final result. table 10 tabulates some temperature results vs. digital outputs. 10- bit temperature data format positive temperature = adc code (d)/4 (3) negative temperature = ( adc code (d) ? 1024)/4 (4) similarly, b it d12 (the sign bit) is not included in the adc code, but the sign is inserted in the final result. this adc code contains db2 to db11. db0 to db1 are not in this calculation. although one lsb of the adc corresponds to 0.0625c, the adc can theoretically measure a temperature range of 255c ( ? 128 c to +127c). the adt7408 is guaranteed to measure a low value temperature limit of ?55c to a high value temperature limit of +125c. reading back th e temperature from the temperature value register requires a 2 - byte read. designers accustomed to using a 9 - bit temperature data format can still use the adt7408 by ignoring the last three lsbs of the 12- bit temperature value. table 10 . 12- bit temperature data format digital output (binary) , d12 to d0 digital output (hex) temperature 1 1100 1001 0000 c90 ?55 c 1 1100 1110 0000 ce0 ?50 c 1 1110 0110 1111 e6f ?25 c 1 1111 1111 1111 fff ?0.0625 c 0 0000 0000 0000 000 0 c 0 0000 0000 0001 0x001 +0.0625 c 0 0000 1010 0000 0x0a0 +10 c 0 0001 1001 0000 0x190 +25 c 0 0011 0010 0000 0x320 +50 c 0 0100 1011 0000 0x4b0 +75 c 0 0110 0100 0000 0x640 +100 c 0 0111 1101 0000 0x7d0 +125 c
adt7408 data sheet rev. a | page 16 of 22 event pin functionality figure 12 shows the three differently defined outputs of event# corresponding to the temperature change. event# can be programmed to be one of the three output modes in the configuration register. if while in interrupt mode the temperature reaches the critical temperature, the device switches to the comparator mode automatically and asserts the event# output. when the temperature drops below the critical temperature, the part switches back to either interrupt mode or comparator mode, as programmed in the configuration register. note that figure 12 is drawn with no hysteresis, but the values programmed into configuration register 0x01, bits[10:9] affect the operation of the event trigger points. see figure 11 for the explanation of hysteresis functionality. event thresholds all event thresholds use hysteresis as programmed in the configuration register 0x01, bits[10:9] to set when they deassert. alarm window trip the device provides a comparison window with an upper temperature trip point in the alarm upper boundary register and a lower trip point in the alarm lower boundary register. when enabled, the event# output is triggered whenever entering or exiting (crossing above or below) the alarm window. critical trip the device can be programmed in such a way that the event# output is triggered only when the temperature exceeds critical trip point. the critical temperature setting is programmed in the critical temperature register. when the temperature sensor reaches the critical temperature value in this register, the device is automatically placed in comparator mode, meaning that the critical event output cannot be cleared through software by setting the clear event bit. interrupt mode after an event occurs, software can write a 1 to the clear event bit in the configuration register to de-assert the event# interrupt output, until the next trigger condition occurs. comparator mode reads/writes on the device registers do not affect the event# output in comparator mode. the event# signal remains asserted until the temperature drops outside the range or until the range is reprogrammed such that the current temperature is outside the range. alarm window event# in ?interrupt? event# in ?comparator? mode event# in ?critical temp only? mode critical temperature hysteresis affects these trip points s/w clears event time 05716-007 1. event# cannot be cleared once the dut temperature is greater than the critical temperature figure 12. temperature, trip, and events
data sheet adt7408 rev. a | page 17 of 22 serial interface control of the adt7408 is carried out via the smbus-/i 2 c- compatible serial interface. the adt7408 is connected to this bus as a slave and is under the control of a master device. figure 13 shows a typical smbus/i 2 c interface connection. event# adt7408 v dd v dd v dd pullup pullup 10k ? 10k ? 10k ? a0 sda scl gnd a1 a2 05716-008 figure 13. typical smbus/i 2 c interface connection serial bus address like all smbus-/i 2 c-compatible devices, the adt7408 has a 7-bit serial address. the four msbs of this address for the adt7408 are set to 0011. pin 1, pin 2, and pin 3 (a0, a1, and a2) set the three lsbs. these pins can be configured either low or high, permanently or dynamically, to give eight different address options. table 11 shows the different bus address options available. recommended pull-up resistor value on the sda and scl lines is 2.2 k to 10 k. table 11. smbus/i 2 c bus address options binary, a6 to a0 hex address 0011 0 0 0 0x18 0011 0 0 1 0x19 0011 0 1 0 0x1a 0011 0 1 1 0x1b 0011 1 0 0 0x1c 0011 1 0 1 0x1d 0011 1 1 0 0x1e 0011 1 1 1 0x1f the adt7408 has been designed with a smbus/i 2 c timeout. the smbus/i 2 c interface times out after 75 ms to 100 ms of no activity on the sda line. after this timeout the adt7408 resets the sda line back to its idle state (sda set to high impedance) and waits for the next start condition. the serial bus protocol operates as follows: 1. the master initiates data transfer by establishing a start condition, defined as a high-to-low transition on the serial data line sda, while the serial clock line, scl, remains high. this indicates that an address/data stream follows. all slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, consisting of a 7-bit address (msb first) plus a r/ w bit. the r/ w bit determines whether data is written to, or read from, the slave device. 2. the peripheral with the address corresponding to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the acknowledge bit. all other devices on the bus now remain idle while the selected device waits for data to be read from or written to it. if the r/ w bit is a 0, then the master writes to the slave device. if the r/ w bit is a 1, the master reads from the slave device. 3. data is sent over the serial bus in sequences of nine clock pulses: eight bits of data followed by an acknowledge bit from the receiver of data. transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, because a low to high transition when the clock is high can be interpreted as a stop signal. 4. when all data bytes have been read or written, stop conditions are established. in write mode, the master pulls the data line high during the 10th clock pulse to assert a stop condition. in read mode, the master device pulls the data line high during the low period before the ninth clock pulse. this is known as no acknowledge. the master then takes the data line low during the low period before the 10th clock pulse, then high during the 10th clock pulse to assert a stop condition. any number of bytes of data can be transferred over the serial bus in one operation. however, it is not possible to mix read and write in one operation because the type of operation is determined at the beginning and cannot subsequently be changed without starting a new operation. the i 2 c address set up by the three address pins is not latched by the device until after this address has been sent twice. on the eighth scl cycle of the second valid communication, the serial bus address is latched in. this is the scl cycle directly after the device has seen its own i 2 c serial bus address. any subsequent changes on this pin have no effect on the i 2 c serial bus address.
adt7408 data sheet rev. a | page 18 of 22 smbus/i 2 c communications the pointer register selects the data registers in the adt7408 . at power-up, the pointer register is set to 0x00, the location for the capability register. the pointer register latches the last location to which it was set. each data register falls into one of the following three types of user accessibility: ? read only ? wr ite only ? write/read same address a write to the adt7408 always includes the address byte and the pointer byte. a write to any register other than the pointer register requires two data bytes. reading data from the adt7408 occurs in one of the following two ways: ? if the location latched in the pointer register is correct, then the read simply consists of an address byte, followed by retrieving the two data bytes. ? if the pointer register needs to be set, then an address byte, pointer byte, repeat start, and another address byte accomplish a read. the data byte has the most significant bit first. at the end of a read, the adt7408 accepts either acknowledge (ack) or no acknowledge (no ack) from the master. no acknowledge is typically used as a signal for the slave that the master has read its last byte. it typically takes the adt7408 100 ms to measure the temperature. writing data to a register with the exception of the pointer register, all other registers are 16 bits wide, so two bytes of data are written to these registers. writing two bytes of data to these registers consists of the serial bus address, the data register address written to the pointer register, followed by the two data bytes written to the selected data register (see figure 14). if more than the required number of data bytes is written to a register, then the register ignores these extra data bytes. to write to a different register, another start or repeated start is required. d15 d13 d14 d12 d10 d11 d9 d8 d7 d5 d6 d4 d2d3 d1 d0 99 1 1 frame 3 most significant data byte frame 4 least significan data byte scl (continued) sda (continued) scl sda stop by master a6 a4a5 a3 a1a2 a0 r/w d7 d5d6 d4 d2d3 d1 d0 99 1 1 frame 1 serial bus address byte frame 2 pointer byte ack by ts ack by ts stop by master start by master 05716-009 ack by ts ack by ts figure 14. writing to the address pointer register, followed by two bytes of data
data sheet adt7408 rev. a | page 19 of 22 reading data from the adt7408 reading data from the adt7408 can take place in one of the following two ways: writing to the pointer register for a subsequent read to read data from a particular register, the pointer register must contain the address of the data register. if it does not, the correct address must be written to the address pointer register by performing a single-byte write operation (see figure 15). the write operation consists of the serial bus address followed by the pointer byte. no data is written to any of the data registers. because the location latched in the pointer register is correct, then the read consists of an address byte, followed by retrieving the two data bytes (see figure 16). reading from any pointer register on the other hand, if the pointer register needs to be set, then an address byte, pointer byte, repeat start, and another address byte accomplish a read (see figure 17). scl s d a a6 a4a5 a3 a1a2 a0 d7 d5d6 d4 d2d3 d1 d0 99 1 1 frame 1 serial bus address byte frame 2 pointer byte ack by ts ack by ts stop by master start by master 05716-010 r/w figure 15. writing to the address pointer register to select a register for a subsequent read operation d7 d5 d6 d4 d2 d3 d1 d0 9 1 frame 3 least significant data byte no ack by master scl (continued) sda (continued) scl s d a stop by master a6 a4a5 a3 a1 a2 a0 r/w d15 d13 d14 d12 d10 d11 d9 d8 99 1 1 frame 1 serial bus address byte frame 2 most significant data byte ack by ts start by master ack by master 05716-011 figure 16. reading back data from the register with the preset pointer
adt7408 data sheet rev. a | page 20 of 22 scl sda a6 a4a5 a3 a1 a2 a0 d15 d13 d14 d12 d10 d11 d9 d8 99 1 1 frame 1 serial bus address byte frame 2 pointer byte ack by ts start by master ack by master d7 d5d6 d4 d2 d3 d1 d0 9 1 frame 5 least significant data byte no ack by master scl (continued) sda (continued) stop by master 05716-012 scl (continued) sda (continued) a6 a4a5 a3 a1 a2 a0 d15 d13 d14 d12 d10 d11 d9 d8 99 1 1 frame 3 serial bus address byte frame 4 pointer byte ack by ts ack by master repeat start by master r/w r/w figure 17. a write to the pointer register followed by a repeat start and an immediate data-word read
data sheet adt7408 rev. a | page 21 of 22 applications information thermal response time the time required for a temperature sensor to settle to a specified accuracy is a function of the thermal mass of the sensor and the thermal conductivity between the sensor and the object being sensed. thermal mass is often considered equivalent to capacitance. thermal conductivity is commonly specified using the symbol q and can be thought of as thermal resistance. it is commonly specified in units of degrees per watt of power transferred across the thermal joint. thus, the time required for the adt7408 to settle to the desired accuracy is dependent on the package selected, the thermal contact established in that particular application, and the equivalent power of the heat source. in most applications, the settling time is best determined empirically. self-heating effects the temperature measurement accuracy of the adt7408 may be degraded in some applications due to self-heating. errors can be introduced from the quiescent dissipation and power dissipated when converting. the magnitude of these temperature errors is dependent on the thermal conductivity of the adt7408 package, the mounting technique, and the effects of airflow. at 25c, static dissipation in the adt7408 is typically 778 w operating at 3.3 v. in the 8-lead lfcsp package mounted in free air, this accounts for a temperature increase due to self-heating of t = p diss ja = 778 w 85c/w = 0.066c current dissipated through the device must be kept to a minimum by applying shutdown when the device can be put in the idle state, because it has a proportional effect on the temperature error. supply decoupling decouple the adt7408 with a 0.1 f ceramic capacitor between v dd and gnd. this is particularly important when the adt7408 is mounted remotely from the power supply. precision analog products, such as the adt7408 , require a well-filtered power source. because the adt7408 operates from a single supply, it might seem convenient to tap into the digital logic power supply. unfortunately, the logic supply is often a switch-mode design, which generates noise in the 20 khz to 1 mhz range. in addition, fast logic gates can generate glitches hundreds of mv in amplitude due to wiring resistance and inductance. if possible, power the adt7408 directly from the system power supply. this arrangement, shown in figure 18, isolates the analog section from the logic switching transients. even if a separate power supply trace is not available, however, generous supply bypassing reduces supply line, induced errors. to achieve the temperature accuracy specifications, local supply bypassing consisting of a 0.1 f ceramic capacitor is critical. place this decoupling capacitor as close as possible to the adt7408 v dd pin. 05176-013 ttl/cmos logic circuits power supply adt7408 0.1f figure 18. using separate tra ces to reduce power supply noise temperature monitoring the adt7408 is ideal for monitoring the thermal environment within electronic equipment. for example, the surface-mounted package accurately reflects the exact thermal conditions that affect nearby integrated circuits. the adt7408 measures and converts the temperature at the surface of its own semiconductor chip. when the adt7408 is used to measure the temperature of a nearby heat source, the thermal impedance between the heat source and the adt7408 must be considered. often, a thermocouple or other temperature sensor is used to measure the temperature of the source, while the temperature is monitored by reading back from the adt7408 temperature value register. once the thermal impedance is determined, the heat source temperature can be inferred from the adt7408 output. as much as 60% of the heat transferred from the heat source to the thermal sensor on the adt7408 die is discharged via the copper tracks, the package pins, and the bond pads. of the pins on the adt7408 , the gnd pin (v ss pin) transfers most of the heat. therefore, when the temperature of a heat source is being measured, thermal resistance between the adt7408 v ss pin and the heat source should be reduced as much as possible. an example of the unique properties of the adt7408 are shown in monitoring a high power dissipation dimm module. ideally, the adt7408 device must be mounted in the middle between the major heat sources of the two memory chips (see figure 19). the adt7408 produces a linear temperature output, while needing only two input/output pins and requiring no external characterization. left bottom middle right so-dimm thermal sensor locations top 05716-014 figure 19. locations of adt7408 on dimm module
adt7408 data sheet rev. a | page 22 of 22 outline dimensions 8 1 5 4 0.30 0.25 0.20 pin 1 index area seating plane 0.80 0.75 0.70 1.55 1.45 1.35 1.84 1.74 1.64 0.203 ref 0.05 max 0.02 nom 0.50 bsc exposed pad 3.10 3.00 sq 2.90 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. coplanarity 0.08 0.50 0.40 0.30 compliant to jedec standards mo-229-weed-4 05-11-2016-a p i n 1 i n d i c a t o r ( r 0 . 1 5 ) top view bottom view side view figure 20. 8-lead frame chip scale package [lfcsp] 3 mm 3 mm body and 0.75 mm package height (cp-8-13) dimensions shown in millimeters ordering guide model 1 temperature range temperature accuracy 2 package description package option ordering quantity branding adt7408ccpz-reel7 ?20c to +125c 2c 8-lead lfcsp cp-8-13 1500 t1m 1 z = rohs compliant part. 2 temperature accuracy is over the 75c to 95c temperature range. i 2 c refers to a communications protocol originally developed by philips semiconductors (now nxp semiconductors). ? 2006C2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d05716-0-6/16(a)

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